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Subject: 
Re: LDCC and Boosters
Newsgroups: 
lugnet.trains
Date: 
Tue, 24 Jun 2003 20:21:53 GMT
Viewed: 
1023 times
  
"Larry Pieniazek" wrote:
In lugnet.trains, Mark Riley wrote:
"Tom Cook" wrote:

I tried running two LDCC RCX bricks in parallel to gain more current. • It was
not a success.  I'm assuming phasing issues and conflicting commands • are to
blame.

Yes, the phase of the signals would have to be tightly in sync
to make this work.

I'm wondering how you could possibly get the signals synced closely enough • for
this to work without a physical cable connecting the two RCX internals
(clocks??? I dunno). What is the cycle timing on these compared to • instruction
clock rate? Even being off by 1% would, I would think, cause pretty good • surges
of current, ne?

The CPU instructions can be anywhere from 1/8 to 1 microsecond
(or longer) in duration.  Assuming you could sync up to within 1us,
you'd still be off by ~2% since the pulse duration for  1/2 of a
DCC "1" bit is 58us.  Hooking up a pair of RCXs in parallel with
that kind of error would probably heat things up pretty quickly.

The test code I wrote to slave a second RCX using the sensor I
mentioned (in the other post)  is only accurate to about ~8us because
of A/D limitations.  It's probably not to DCC specifications
but the decoders I tested it with (DN121, DZ143) didn't seem
to mind.  Improved code and/or an alternate sensor design
should be able to get it to specs.

Mark (who finds it kinda amusing to be geek'n in .trains).



Message has 1 Reply:
  Re: LDCC and Boosters
 
(...) You'd have to look at the actual spec's for DCC, which are hosted by NMRA. I'm not sure what they actually call for- I know they are fairly tolarent of misdeeds. James (how nice to have someone geeking for us!) (21 years ago, 24-Jun-03, to lugnet.trains)

Message is in Reply To:
  Re: LDCC and Boosters
 
(...) I'm wondering how you could possibly get the signals synced closely enough for this to work without a physical cable connecting the two RCX internals (clocks??? I dunno). What is the cycle timing on these compared to instruction clock rate? (...) (21 years ago, 24-Jun-03, to lugnet.trains)

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