Subject:
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Re: Motor Control Register (0xf000) and Memory Space 0xFDB0-0xFD7F
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Newsgroups:
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lugnet.robotics.rcx, lugnet.robotics.rcx.legos
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Date:
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Sun, 1 Dec 2002 22:11:05 GMT
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Reply-To:
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Dick Swan <dickswa@sbcglobal.net^nospam^>
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Viewed:
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4204 times
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This note is of interest to people who build their own RCX firmware.
It provides some additiional insight to the recent post concerning
dual use of upper memory range and the motor control register.
There's a trade-off between real time performance and using internal
on-chip RAM vs external RAM for address ranges 0xFB80 - 0xFF7F.
The H8 CPU used in the RCX has 512 bytes of internal on-chip RAM as
well as the 32K of external RAM. The internal on-chip RAM has
significantly faster access times -- onchip uses a 16-bit bus vs 8-bit
external bus and has no wait states. On-chip RAM occupies memory
addresses 0xFD80 - 0xFF7F. The H8 system control register controls
whether on-chip RAM is enabled.
The firmware I use has on-chip RAM enabled. So does the firmware that
Lego ships. I locate my stack at 0xFE00 - 0xFEFF so that it it in the
faster on-chip RAM. In my case this improves real time RCX performance
by 6-8%.
There are multiple flavors of H8 chips. One of these has 1K of on-chip
RAM at 0xFB80 - 0xFF7F. When on-chip RAM is enabled, this complete
block of 1K is blocked from external RAM use. Since the RCX has only
512 bytes of on-chip RAM, 0xFB80 - 0xFD7F is "reserved" as well and
not available for external RAM.
Another real time performance factor is the use of memory at 0xFF00 -
0xFF7F. The H8 has optimized instructions that only require 1-byte
instead of 2-byte absolute addresses for this range. I can't find my
notes on measurements of this but I recall measuring a 8-10%
performance improvement when I had linker use this space for the high
usage variables. [I use Hitachi's HEW toolchain which will
automatically do this with a single option specification].
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