Subject:
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Quad encoders = the code
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Newsgroups:
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lugnet.robotics.handyboard
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Date:
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Mon, 12 Feb 1996 06:15:00 GMT
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Original-From:
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Barthelet, Luc <lucb@ea.comNOSPAM>
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Viewed:
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2472 times
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I have been successful in coding the Quad encoders.
You will find below:
- The source for the asm file
- The source for the C file
- the ICB file
Thanks to the assembler on the web. I tried to use some of the Macintosh
tools from the 68hc11 MIT FTP. I lost my source file in the process.
I used a Macintosh mouse as suggested by a some of you.
There is more connection info at the top of the asm file
Both the ASM and C file were started from the encoder files in the libraries.
Thx for all the help.
ASM file:
------------------------------------------------------------------
* Luc Barthelet, lbarthelet@ea.com
* Quad encoders feb-11-1996
* Handy Board
* This code handles two quad encoders (A&B)
* Quad A is to be connected to input 7 and 10
* Quad B is to be connected to input 8 and 11
* Each quad encoder generates interrupts on input 7 or 8
* the code then reads the direction on input 10 or 11
* a macintosh mouse has a chip # 343-0065-A
* it is the Apple desktop bus chip
* pin 1,2 and 18,19 are the TTL quad signals
* I connected pin 1 to input 10
* pin 2 to input 7
* pin 19 to input 11
* pin 18 to input 8
* I provide +5v and Gnd from the handy board.
*
* based on encoders.asm from
* Anne Wright Jan 19, 1993
#include <6811regs.asm>
* program equates
port_address EQU $7fff
port0_mask EQU %00000001
port1_mask EQU %00000010
* variables
ORG MAIN_START
variable_quad_A_count FDB 0
variable_quad_B_count FDB 0
interrupts_installed FCB 0
subroutine_initialize_module:
#include <ldxibase.asm>
* X now has base pointer to interrupt vectors ($FF00 or $BF00)
LDD #Port0_ShaftInt
STD TIC3INT,X
LDD #Port1_ShaftInt
STD TIC2INT,X
* Setup Interrupt for Encoders *
LDX #BASE
BSET TCTL2,X %00000101 /* Interrupts TIC3,TIC2 rising edge*/
BCLR TFLG1,X %00000011 /* Clear IC3,IC2 Flags */
BCLR TMSK1,X %00000011 /* Clear Mask For Interrupt */
LDAA #0
STAA interrupts_installed /* default interrupts not intalled */
RTS
Port0_ShaftInt:
LDX variable_quad_A_count
LDAA port_address
ANDA #port0_mask
BEQ dec_QuadA
INX
BRA quadA_Done:
dec_QuadA:
DEX
quadA_Done:
STX variable_quad_A_count
LDX #BASE
BCLR TFLG1,X %11111110
RTI
Port1_ShaftInt:
LDX variable_quad_B_count
LDAA port_address
ANDA #port1_mask
BEQ dec_QuadB
INX
BRA quadB_Done:
dec_QuadB:
DEX
quadB_Done:
STX variable_quad_B_count
LDX #BASE
BCLR TFLG1,X %11111101
RTI
------------------------------------------------------------------
C File:
------------------------------------------------------------------
void enable_quad_encoder(int i)
{
if(i==0)
{
bit_set(0x1022,1);
quad_A_count=0;
}
else if(i==1)
{
bit_set(0x1022,2);
quad_B_count=0;
}
}
void disable_quad_encoder(int i)
{
if(i==0)
{
bit_clear(0x1022,1);
}
else if(i==1)
{
bit_clear(0x1022,2);
}
}
void reset_quad_encoder(int i)
{
if(i==0)
quad_A_count=0;
else if(i==1)
quad_B_count=0;
}
int read_quad_encoder(int i)
{
if(i==0)
return(quad_A_count);
else if(i==1)
return(quad_B_count);
return(0);
}
void tq()
{
enable_quad_encoder(0);
enable_quad_encoder(1);
while(1)
{
int i;
for (i=15; i>6; i--)
if (digital(i)) printf("1");
else printf("0"); printf(" %d %d \n",
read_quad_encoder(0),
read_quad_encoder(1)
);
}
}
------------------------------------------------------------------
ICB file:
------------------------------------------------------------------
S12380200000000000B6103C84402605CEFF002003CEBF00CC8050EDEACC8068EDECCE10F0
S1238040001C21051D23031D22038600B7802439FE8020B67FFF8401270308200109FF8009
S123806020CE10001D23FE3BFE8022B67FFF8402270308200109FF8022CE10001D23FD3BD8
S9030000FC
S123872B0000000000B6103C84402605CEFF002003CEBF00CC875BEDEACC8773EDECCE10BA
S123874B001C21051D23031D22038600B7872F39FE872BB67FFF8401270308200109FF87CC
S123876B2BCE10001D23FE3BFE872DB67FFF8402270308200109FF872DCE10001D23FD3B97
S9030000FC
6811 assembler 10-Aug-91
original program by Motorola.
a few modifications by Randy Sargent (rsargent@media.mit.edu)
ADCTL 1030 *0055
ADR1 1031 *0056
ADR2 1032 *0057
ADR3 1033 *0058
ADR4 1034 *0059
BADOPINT 00f8 *0092
BASE 1000 *0012 0131 0152 0167
BAUD 102b *0050
BPROT 1035 *0060
CFORC 100b *0024
CMEINT 00fc *0094
CONFIG 103f *0070
COPRST 103a *0065
DDRC 1007 *0020
DDRD 1009 *0022
HPRIO 103c *0067 0113
INIT 103d *0068
IRQINT 00f2 *0089
NOCOPINT 00fa *0093
OC1D 100d *0026
OC1M 100c *0025
OPTION 1039 *0064
PACNT 1027 *0046
PACTL 1026 *0045
PAIINT 00da *0077
PAOVINT 00dc *0078
PIOC 1002 *0016
PORTA 1000 *0014
PORTB 1004 *0018
PORTC 1003 *0017
PORTCL 1005 *0019
PORTD 1008 *0021
PORTE 100a *0023
PPROG 103b *0066
Port0_ShaftInt 875b *0141 0123
Port1_ShaftInt 8773 *0156 0126
RESETINT 00fe *0095
RESV1 1001 *0015
RESV2 1036 *0061
RESV3 1037 *0062
RESV4 1038 *0063
RTIINT 00f0 *0088
SCCR1 102c *0051
SCCR2 102d *0052
SCDR 102f *0054
SCIINT 00d6 *0075
SCSR 102e *0053
SPCR 1028 *0047
SPDR 102a *0049
SPIINT 00d8 *0076
SPSR 1029 *0048
SWIINT 00f6 *0091
TCNT 100e *0029
TCTL1 1020 *0039
TCTL2 1021 *0040 0132
TEST1 103e *0069
TFLG1 1023 *0042 0133 0153 0168
TFLG2 1025 *0044
TI4O5 101e *0037
TIC1 1010 *0030
TIC1INT 00ee *0087
TIC2 1012 *0031
TIC2INT 00ec *0086 0127
TIC3 1014 *0032
TIC3INT 00ea *0085 0124
TMSK1 1022 *0041 0134
TMSK2 1024 *0043
TOC1 1016 *0033
TOC1INT 00e8 *0084
TOC2 1018 *0034
TOC2INT 00e6 *0083
TOC3 101a *0035
TOC3INT 00e4 *0082
TOC4 101c *0036
TOC4INT 00e2 *0081
TOC5INT 00e0 *0080
TOINT 00de *0079
XIRQINT 00f4 *0090
dec_QuadA 8768 *0148 0145
dec_QuadB 8780 *0163 0160
interrupts_installed 872f *0109 0137
port0_mask 0001 *0100 0144
port1_mask 0002 *0101 0159
port_address 7fff *0099 0143 0158
quadA_Done 8769 *0150 0147
quadB_Done 8781 *0165 0162
subroutine_initialize_module 8730 *0111
variable_quad_A_count 872b *0107 0142 0151
variable_quad_B_count 872d *0108 0157 0166
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