 | | Re: mindstorms NXT and memory —Alexander Sack
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| | | (...) Since I'm an engineer, I will give you the standard engineering answer: Depends on the requirements! :-) (...) (URL) ARM architecture has been around for years and has been a very effective RISC based embeddded CPU core. That Wiki article does (...) (19 years ago, 9-Jan-06, to lugnet.robotics)
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| | | | | Re: mindstorms NXT and memory —steve
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| | | | (...) I would be inclined to guess that the ARM is just the CPU core implemented in the same chip as all the other stuff the NXT uses. One of the huge reasons for picking the ARM is that it's very well suited to being integrated into the same chip (...) (19 years ago, 9-Jan-06, to lugnet.robotics)
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| | | | | | Re: mindstorms NXT and memory —Alexander Sack
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| | | | (...) Right but that's not what I'm really asking! :-)! I'm sure its a variation of an ARM7 chip which will implement the standard ARM ISA. However, with any ARM7 implementation it can be catered to a specific applications. From the ARM website: (...) (19 years ago, 9-Jan-06, to lugnet.robotics)
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| | | | | | Re: mindstorms NXT and memory —steve
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| | | | (...) > NXT FAQ talks about playing music. You can play music quite easily without SIMD. (...) > NXT (a nice idea from the programmers standpoint). I know the J2ME KVM > can be as small as 128K. Well, you can run Java on an RCX... (URL) you (...) (19 years ago, 9-Jan-06, to lugnet.robotics)
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| | | | | | Re: mindstorms NXT and memory —Jordan Bradford
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| | | | (...) Do you mean machine code (binary) or assembly language? I first learned assembly language programming on a MIPS chip (RISC). I've also done it on a Motorola 68HC11 (a microcontroller), and I've written both pure machine code and assembly (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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| | | | | | Re: mindstorms NXT and memory —Alexander Sack
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| | | | (...) There the same. (...) I guess my last post didn't make it. Fundamentally, Steve is correct that RISC is typically more complex to program since it uses less general purpose registers and more complex instructions (it tries to do more per clock (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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| | | | | | Re: mindstorms NXT and memory —Kevin L. Clague
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| | | | (...) Obviously you've not coded in machine language, or you'd know they are not. (...) You misunderstand RISC and CISC. CISC instructions often combine data memory references with arithmetic, logical, or brach capabilities. RISC machines do not. (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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| | | | | | Re: mindstorms NXT and memory —Alexander Sack
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| | | | (...) If you are talking about the actual 1's and 0's that represent machine code then you are correct and I misinterpreted your last post, i.e. the binary. When people speak of binaries they are usually referring to something like an executable (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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| | | | | | Re: mindstorms NXT and memory —Kevin L. Clague
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| | | | (...) Now you're talkin! I've never really done more than a half dozen instructions, unless it was a homework problem waaaaaaaay (and I really mean waaaaaaaay ;^) back in college. (...) I guess this is what CISC proponents say. I don't know that I (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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| | | | | | Re: mindstorms NXT and memory —Alexander Sack
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| | | | (...) I totally agree! I stated this in another thread (or maybe this one) that assembly code on Intel is like Java Byte Code (but worse). I mean its not like you *really* know as a "high-level assembly programmer" exactly the order in which (...) (19 years ago, 10-Jan-06, to lugnet.robotics, FTX)
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