Subject:
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8 bit timer problem
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Newsgroups:
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lugnet.robotics.rcx
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Date:
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Thu, 19 May 2005 15:51:36 GMT
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Viewed:
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5284 times
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Hi
I am a member of a project group at Aalborg
University, Denmark, and the goal for our project
on this semester is to code an operating system for
the RCX brick from Lego.
During a whole week, I have been strugling with the
8 bit timers of the H8/3292 (which is a member of
the H8/3297 series). I have in my hand section 9 of
the hardware manual from Renesa (entitled "8-Bit
Timers"), which should be enough to make the timers
work. I had no problems making the 16 bit timer
work using section 8 of the same manual. If someone
is interested, my collections of links can found
here: http://martintoft.dk/rcx
Let us jump right into the problem: I follow
section 9 of the hardware manual to the letter, but
I cannot make the 8 bit timers work completely. I
am able to set up one of the channels, such that
the overflow interrupt is requested on counter
overflow, but when I try enabling either CMIA or
CMIB (Compare-Match Interrupt Request A/B, done by
setting bit 6/7 of the TCR, Timer Control Register)
the brick fails to continue. I have tried executing
my program in BrickEmu and on a real RCX brick - I
get no error message from BrickEmu, and the RCX
brick just ceases operation (it does not power off,
just stops further execution). I know it is not a
problem with my interrupt handler, because I used
the same handler when I successfully enabled the
"on-counter-overflow-interrupt-request".
I use these typedefs:
typedef unsigned char byte;
typedef unsigned int word;
I use these defines:
// Timer Control Register
#define C0_TCR *((volatile byte*)0xffc8)
// Timer Control/Status Register
#define C0_TCSR *((volatile byte*)0xffc9)
// Time Constant Register A
#define C0_TCORA *((volatile byte*)0xffca)
// Serial/Timer Control Register
#define C01_STCR *((volatile byte*)0xffc3)
// Compare-Match A Interrupt Vector
#define C0_CMIA *((volatile word*)0xfda8)
Here is my main function, which sets up channel 0
of the timer and "installs" the interrupt handler:
void _main(void)
{
// Make sure channel 0 of the timer is turned
// off
C0_TCR = 0;
// Set time constant register A to 100
// (this value is not important)
C0_TCORA = 100;
// Clear counter on compare-match A
C0_TCR &= ~0x08; // Clear bit 3
C0_TCR |= 0x10; // Set bit 4
// Choose slowest internal clock source
// (Oe_p/1024)
C0_TCR |= 0x03; // Set bit 0+1
C0_TCR &= ~0x04; // Clear bit 2
C01_STCR &= ~0x01; // Clear bit 0
// Make sure compare-match flag A is cleared
C0_TCSR &= ~0x40; // Clear bit 6
// Set interrupt vector
C0_CMIA = (word)&handler;
// Enable compare-match interrupt request A
C0_TCR |= 0x40; // Set bit 6
// Busy wait forever
while (1);
}
This is my interrupt handler:
void handler(void)
{
asm("push r0 \n\t" // Save registers
"push r1 \n\t" // CCR and r6 are saved by
"push r2 \n\t" // ROM dispatcher
"push r3 \n\t"
"push r4 \n\t"
"push r5 \n\t"
"bset #7, @0x80:8 \n\t" // Start motor A
"bclr #6, @0xc3:8 \n\t" // Clear CMFA
// (bit 6 of
// TCSR)
"pop r5 \n\t" // Restore registers
"pop r4 \n\t"
"pop r3 \n\t"
"pop r2 \n\t"
"pop r1 \n\t"
"pop r0"
);
}
I expect motor A to start when the interrupt is
requested by the timer, but nothing happens. At
this point I am very lost :( Does somebody have a
solution for the riddle?
Some interrupt handlers get rid of GCC's
framepointer by popping r6 before saving r0-r5 and
pushing it back again after restoring r5-r0. I have
tried adding it to the handler above, but it does
not make a difference. Is it strictly necessary to
do this "trick" in a interrupt handler when you are
not compiling with -fomit-frame-pointer? And what
if I clobber r6 in my handler?
Any help would be appreciated.
Thanks in advance.
Best regards,
Martin Toft
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Message has 1 Reply:
 | | Re: 8 bit timer problem
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| (...) Looks like a typo - try this in your handler instead: "bclr #6, @0xc9:8 \n\t" // Clear CMFA // (bit 6 of // TCSR) I haven't really checked the rest of the code for anything else, though. HTH, Mark (20 years ago, 19-May-05, to lugnet.robotics.rcx)
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